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OSIRIS Schematic Migration

Rapid and efficient schematic migration is an essential tool for evaluating target processes for full chips and IP cores. Migrated circuits using components from a new PDK can be simulated to evaluate their performance in the new process.  This is particularly important for IP companies who need to license analog cores to new customers in unfamiliar processes.

Migration Overview

OSIRIS's mapping, placement and re-wiring capabilities take it far beyond the functionality of a simple component swapper. Interactive GUIs find circuit symbols in the source design and guide the mapping of pins and parameters to the target symbol and reference libraries such as standard cells can be replaced with versions from the new foundry.

Physical differences between PDKs such as cell origin, symbol size or pin differences are automatically resolved.  Rewiring tools allow new pins to be added and tied to specified nets while stray wires from deleted pins are cleaned from the circuit. Component checking and re-wiring ensures that full circuit hierarchies are migrated in a single pass.

The complexities of property translation between source and target PDKs are handled automatically without users needing to convert between types.  Optional recalculation can be invoked to adjust physical parametes to retain passive values.
Schematic methodology

Pin and Parameter Mapping

The task of mapping pins and parameters between PDKs is greatly simplfied by the OSIRIS graphical interfaces.  Information from the original and new PDKs are identified and presented to the user in a clear format for easy mapping and conversion.  Values can be modified by simple scaling or through complex relationships as required.  

Pins are automatically rerouted as part of the migration process to ensure connectivity even when the symbol size and pin positions differ.

Property types are converted automatically during the migration process to ensure parameters completely match the requirements of the new PDK.  Intelligent parameter assignment and callback triggers allow even the most complex components to be converted for core parameters and extra simulation or layout constraints.

Capabilities and Features

OSIRIS schematic migration features a host of features and capabilities that make it the most powerful and versatile schematic migration tool on the market.  From interactive component mapping to automatic rewiring and short location, OSIRIS tools can migrate the most complex designs between PDKs from IDMs and custom foundries.  

Advanced features of the Cadence database such as hierarchical parameters and netset properties are fully retained to deliver a completely migrated schematic which contains the full functionality of the original design.

More OSIRIS Schematic features >>

Interactive Schematic Comparison

Checking that the migrated schematic maintains the integrity of the circuit while following the intent of the migration is an essential part of circuit migration.  OSIRIS features a dedicated migration comparison tool that check the placement, connectivity and parameters of the target circuit to ensure it matches the original.

Unlike an LVS tool, schematic comparison accounts for differences in component names, parameter types and values to instantly identify discrepancies between old and new circuits. Problems such as max/min size violations or component crowding are reported and highlighted within the schematic editor for easy identification and resolution.

Simulation and Test Integration

OSIRIS is fully integrated in to the Cadence Analog Design Environment (ADE) and fully compatible with a wide variety of simulation and verification software.  

Combining OSIRIS with Cadence's ADE gives designers the capability to rapidly migrate, analayze and verify their designs in a wide variety of processes and foundries. Full simulations including corner and statistical analysis gives users the ability to process and test the most complex circuits with ease.

Higher levels of the ADE adjust component sizes for optimum design centring and performance, delivering a fully migrated circuit in a fraction of the time taken for redesign.


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