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OSIRIS Design Migration Technology

IN2FAB's OSIRIS suite of migration tools are designed to address the complex task of transferring schematic and layout data from one process or foundry to another.  Built within the Virtuoso platform from Cadence Design Systems, OSIRIS processes data at the PDK level to perform complete mapping of circuit elements from source to target.  OSIRIS is fully compatible with process design kits from all customer foundries as well as those of private semiconductor companies.

Technology & Services

Schematic Migration Layout Migration Viewlogic Translation Chip Slice
IN2FAB's OSIRIS schematic migration tools are the fastest way to convert Cadence schematics from one PDK to another.

Component mapping is controlled through intuitive GUIs and parameters automatically converted to match the new PDK. 

Symbol and pin differences are resolved through built-in rewiring to ensure 100% automatic migration of even the most comples schematic designs.
OSIRIS layout migration tools solve the complex task of migration layout data between processes and foundries.

Polygon and Pcell designs can be migrated and new layout contains polygon and Pcell data which matches the original design.

Physical differences are resolved through intelligent aligment and reconnection algorithms and further rule compliance can be enforced through optional extension software.
IN2FAB has  the only direct database converter to import designs from Viewlogic tools in to Cadence.

Viewlogic files are read directly in to Cadence format in a single pass without any conversion through EDIF or other intermediate database.

Output schematics are fully editable and can be updated to a new foundry PDK using OSIRIS schematic tools.

Chip Slice is a tool that generates cross section views of design data from a line drawn across the layout.

Layer information can be defnied to reflect the height and profile of the manufacturing process to show the side view of any layout.

Layer information can be saved separately or directly in the technology file to give a fully integrated cross section generation capability.
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