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Viewlogic Translation

Viewlogic Systems Inc produced a series of EDA tools which were popular with semiconductor designers, particularly in schematic capture and simulation.  While the business is no longer trading after being acquired, many companies still have an extensive archive of designs in Viewlogic format which represent a large part of their semiconductor IP.

IN2FAB's Viewlogic translation tools allow companies to unlock the value of these circuits by giving a direct path to translate these files in to Cadence format.  Once converted, databases can be further processed to use components from the latest foundry PDK with INFAB's OSIRIS schematic migration software.  This can match the process of the original design or the circuit can be migrated to a new process, ready for simulation and production.

Translation Overview

IN2FAB's Viewlogic database conversion tools are the only way of translating Viewlogic and Viewldraw libraries directly in to the Cadence toolset.

Viewlogic files are read from source and converted directly in to Cadence format without any need for intermediate files such as EDIF.  Archive files can be read directly from an ASCII source so designers can convert their circuits without any preliminary adjustment or formatting. 

The hierarchy and topology of the converted circuit is an exact match for the original Viewlogic library with full support for all circuit elements and data types.  Complex structures such as bussed and multiple instances as well as hierarchical nets and properties are all converted to Cadence format while incompatible data and naming constructs are updated to comply with Cadence processing rules.

Testbench schematics and netlist files can also be converted to deliver a complete design which is ready for use in the Cadence system.
Viewlogic Translation

Viewlogic Symbol Conversion Symbol File Conversion

Symbols are converted to Cadence format to give an exact match with the original Viewlogic data.  Shape, text and pin information is fully preserved along with core property information.
Viewlogic symbols from the MXS, builtIn and other core libraries form the basic building blocks of the circuit.  These are converted directly from single files (SYM.LIB) or directory files to generate an equivalent library in Cadence format for use in subsequent circuit schematics. 

Scalable symbols can also be generated to support scaled placements in circuit schematics along with stop views for easy netlist generation.

Primitive Viewlogic cells in Spice netlist format are also automatically translated to Cadence schematics as part of the conversion process to allow the Cadence database to generated netlists in a single pass.

Schematic File Conversion

Viewdraw schematic conversion delivers a full representation of the circuit database from the files that make up the original design.  Complete libraries are read in a single pass enabling rapid and simple design conversion.

Symbols, wires and other circuit elements such as borders and title blocks will be placed as they were in the Viewlogic circuit and symbol, pin and net names will match the original design. 
Symbol and reference libraries are fully supported and the data can be scaled as part of the translation to make the circuit size compatible with standard PDKs from foundries or other sources.

Testbench libraries can be used to generate matching schematics in the Cadence system featuring a full range of sources, components and measurement elements.
Viewlogic schematic conversion

Viewlogic schematic migration PDK Update

Once converted, the Cadence database can be updated to use primitive components from the latest Cadence foundry PDK rather than primitives in the Viewlogic format. 

Using the OSIRIS schematic migration tools, primitive symbols are replaced and the wiring automatically updated to connect to the pins on the new symbols.  Producing a circuit with same connectivity as the original without any manual intervention by circuit designers.

Once migrated, the circuit is ready for simulation using models from the latest PDK giving full compliance with the foundry's technology.


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